Multilayer circuits are well known in the art. Generally, a multilayer circuit substrate includes multiple stacked circuit patterns which are spaced apart by insulation material. The various layers of the circuit patterns are electrically interconnected at selected locations, typically by using conductive vias. Conductive vias are holes plated with conductive material which are formed through one or more layers of the substrate to provide electrical interconnection between layers. A particular multilayer circuit substrate may require several conductive vias to provide the necessary electrical interconnection among the various layers. The conductive via most commonly encountered in the art originates from one surface of the substrate and extends to an opposing surface of the substrate. Another type of via, the "blind via", originates at one surface and extends only through a portion of the substrate. Yet, another type, the "buried via", orginates and terminates within the substrate. A conductive via which at least originates from a surface of the substrate is termed herein as a "surface via".
Surface vias may consume significant space on a given circuit substrate. In the majority of cases, these surface vias are located away from circuit pads formed to receive electrical components, such that solder deposited on a circuit pad to facilitate the electrical interconnection of an electrical component does not flow through the via. Consequently, if an interconnection is to be made from a circuit pad located on one surface of the substrate, to a circuit pattern on another layer of the substrate, a conductive runner is formed to extend from the circuit pad to a location away from the circuit pad where the conductive via is formed. Thus, the inclusion of surface vias in a circuit substrate limits the circuit density of the substrate, and also complicates the interconnection scheme among layers. Efforts are constantly being made to limit the use of surface vias in order to achieve a more space efficient circuit substrate which has an interlayer interconnection scheme capable of supporting intricate interlayer electrical connections.
Various attempts have been made to design and manufacture multilayer substrates with interlayer electrical interconnections formed to minimize substrate space consumption. One approach is described in U.S. Pat. No. 5,046,238, issued to Daigle, et al. on Sep. 10, 1991 for A Method of Manufacturing a Multilayer Circuit Board. Daigle describes a method in which the preparation of a discrete circuit substrate layer includes the steps off forming electrical circuitry on a dielectric layer by forming an access opening at selected locations through the dielectric layer to expose selected circuit locations; forming conductive posts in the access opening to a level below the top of the access opening; and providing a fusible conductive material in the access opening on the top of the conductive posts. A stack of these substrate layers are; subjected to heat and pressure simultaneously to fuse the layers of dielectric substrate and the fusible conductive material, to provide a multilayer circuit board. This prior art method has several disadvantages including problems encountered with spreading of the solder during lamination, and problems caused by the presence of flux material necessary to deoxidize the solder which creates long term reliability problems. Multilayer structures made with fusible dielectric materials tend to be too fragile, too expensive, and not suitable for high thermal applications.
Another method is described in U.S. Pat. No. 5,309,629, issued to Traskos, et al. on May 10, 1994, for a Method of Manuafacturing a Multilayer Circuit Board. Traskos'method is similar to that of Daigle except that multiple substrate layers are laminated rather than fused together. This method still produces circuit substrates which suffer from some of the problems of Daigle, including cost, complexity, and lack of suitability for many applications.
It is desirable to have a multilayer circuit substrate in which through-hole conductive vias do not consume valuable space on the surface of the circuit substrate. Additionally, it is desirable to accommodate a significant number of interconnections among the various layers of the circuit substrate. Yet, such a circuit substrate must be capable of being economically manufactured and must provide reliable electrical interconnections among the layers, while supporting a variety of applications. Therefore, a new approach to the manufacturing of multilayer circuit substrates is needed.